The invention relates to a chip carrier semiconductor device assembly and a method for forming the same.
In a conventional tape automated bonding method, a semiconductor chip is bonded on a packaging substrate by an inner lead bonding method wherein pads of the semiconductor chip are bonded to bumps provided at the top portion of inner leads of a tape carrier as well as by a soldering bonding between outer leads of the tape carrier. Those techniques or the of inner lead bonding and the outer lead bonding are disclosed in Mar. 27, 1991 "Microelectronics Packaging Handbook" pp. 326-347.
It has been known in the art to further provide connective terminals at insides of the chip in addition to peripheral leads in order to permit an increase in the number of the connections of the chip. This technique is known as a area tape automated bonding developed by IBM Corporation.
Another technique to increase the number of connective pins is disclosed in the Japanese laid-open patent application No. 2-58245 wherein contact pads are arranged on a peripheral portion of the chip to form two staggered rows so that leads extend from the contact pads of the inside and the outside rows in an outward direction to permit an increase in the number of the connections of the chip.
Still another technique of a bumpless bonding method to increase of the number of connective pins is disclosed in the Japanese laid-open patent application No. 2-58245 wherein wedge bonding is used.
The foregoing prior art suffers from problems as described below. In the tape automated bonding method, bonding of the tape automated bonding on the packaging substrate is carried out by soldering the outer leads thereby resulting in an enlargement of a packaging area up to a few times that of a chip area. The area tape automated bonding method and the double aligned connection technique also suffers from these problems. On the other hand, a flip chip bonding method has a problem as described below. In the flip chip bonding, after packaging the semiconductor chip on the packaging substrate through the bump, it is necessary to seal the chip by a sealing resin. Actually, there is a possibility of an incomplete sealing thereby lowering productivity.